module beep_ctrl(
    input sys_clk,
    input sys_rst_n,

    input key_value,
    input key_flag,
    output reg beep
);

always @(posedge sys_clk or negedge sys_rst_n) begin
    if(!sys_rst_n) begin
        beep <= 1'b0;
    end
    else if(key_flag && (key_value==0))
        beep = ~beep;
end

endmodule